Logic Level Compatibility Calculator
Check static digital logic-level compatibility from guaranteed driver output specifications and receiver input thresholds. The calculation uses VOH,min, VOL,max, VIH,min and VIL,max, not supply-voltage labels alone.
Logic threshold compatibility is not complete electrical safety. Always verify absolute maximum ratings, input tolerance, clamp current, output drive, loading, open-drain rise time and the specific device datasheet.
Engineering tool
Logic Level Compatibility Calculator
Check static digital logic threshold compatibility from guaranteed VOH, VOL, VIH and VIL specifications, not supply voltage labels alone.
Parameter panel
Driver guaranteed minimum HIGH output voltage from the datasheet.
Driver guaranteed maximum LOW output voltage from the datasheet.
Receiver minimum voltage guaranteed to be recognized as HIGH.
Receiver maximum voltage guaranteed to be recognized as LOW.
Optional receiver maximum input voltage. Leave blank if unknown; electrical safety will be Not Evaluated.
Optional possible maximum HIGH voltage at the receiver input. Used only for VIN,max separation.
Result console
- Overall Static Compatibility
- Compatible
- HIGH Compatibility
- Compatible
- HIGH Noise Margin NMH
- 0.4V
- LOW Compatibility
- Compatible
- LOW Noise Margin NML
- 0.4V
- Worst Static Noise Margin
- 0.4V
- Input Electrical Limit
- Not Evaluated
- Formula
- NMH = VOH,min - VIH,min; NML = VIL,max - VOL,max
Static logic thresholds are evaluated from the entered guaranteed values only. Verify absolute maximum ratings, input tolerance, clamp current, output current, loading, temperature and device-specific datasheet limits separately.
Formula reference
Logic-Level Compatibility Formulas
Static threshold compatibility requires both HIGH and LOW levels to meet guaranteed datasheet limits.
HIGH compatible: VOH,min >= VIH,minLOW compatible: VOL,max <= VIL,maxNMH = VOH,min - VIH,minNML = VIL,max - VOL,maxNMworst = min(NMH, NML)Open-drain VOH,effective ≈ Vpullup - VdropVariable definitions
- Driver
- device that produces the digital output signal
- Receiver
- device that accepts the digital input signal
- VOH,min
- driver guaranteed minimum HIGH output voltage
- VOL,max
- driver guaranteed maximum LOW output voltage
- VIH,min
- receiver minimum voltage guaranteed as HIGH
- VIL,max
- receiver maximum voltage guaranteed as LOW
- NMH
- HIGH noise margin
- NML
- LOW noise margin
Worked Examples
Classic TTL to TTL
VOH,min = 2.4 V, VOL,max = 0.4 V, VIH,min = 2.0 V, VIL,max = 0.8 V -> NMH = 0.4 V, NML = 0.4 V, compatible.
HIGH Incompatible
VOH,min = 2.4 V and VIH,min = 3.0 V -> NMH = -0.6 V, so HIGH is not compatible.
LOW Incompatible
VOL,max = 0.8 V and VIL,max = 0.5 V -> NML = -0.3 V, so LOW is not compatible.
Boundary HIGH
VOH,min = 2.0 V and VIH,min = 2.0 V -> NMH = 0 V, a marginal boundary condition.
Boundary LOW
VOL,max = 0.8 V and VIL,max = 0.8 V -> NML = 0 V, a marginal boundary condition.
3.3 V CMOS-Style Reference
VOH,min = 2.9 V, VOL,max = 0.4 V, VIH,min = 2.31 V, VIL,max = 0.99 V -> NMH = 0.59 V and NML = 0.59 V.
3.3 V Output to 5 V CMOS-Like Input
VOH,min = 2.9 V and receiver VIH,min = 3.5 V -> HIGH threshold fails.
3.3 V Output to TTL-Threshold Input
VOH,min = 2.9 V and receiver VIH,min = 2.0 V -> HIGH margin = 0.9 V, if LOW also satisfies threshold.
Bidirectional Direction Difference
A to B can pass while B to A fails because each direction uses a different driver output and receiver input specification.
Target HIGH Margin
Receiver VIH,min = 2.0 V and target NMH = 0.5 V require driver VOH,min >= 2.5 V.
Target LOW Margin
Receiver VIL,max = 0.8 V and target NML = 0.3 V require driver VOL,max <= 0.5 V.
Open-Drain Static Pass
Pull-up = 3.3 V, VIH,min = 2.0 V, VOL,max = 0.4 V, VIL,max = 0.8 V -> NMH = 1.3 V and NML = 0.4 V.
Open-Drain Pull-Up Too Low
Pull-up = 1.8 V and receiver VIH,min = 2.0 V -> HIGH threshold fails.
Undefined Receiver Input
With VIL,max = 0.8 V and VIH,min = 2.0 V, Vin = 1.4 V is in the undefined region.
Threshold Pass but VIN,max Warning
A 5.0 V HIGH may satisfy VIH,min = 2.0 V but exceed receiver VIN,max = 3.6 V. Logic threshold and input limit must be reported separately.
Engineering Notes
- Logic-level compatibility is determined from guaranteed driver output levels and receiver input thresholds.
- VOH,min must meet or exceed VIH,min.
- VOL,max must be less than or equal to VIL,max.
- HIGH noise margin is VOH,min - VIH,min.
- LOW noise margin is VIL,max - VOL,max.
- Positive noise margin provides threshold headroom.
- Zero margin is only a boundary condition and provides no threshold headroom.
- Typical values should not replace guaranteed datasheet limits when checking worst-case compatibility.
- Supply voltage alone is not enough to determine compatibility.
- A 3.3 V output may drive some 5 V inputs but not others.
- A 5 V output may satisfy logic threshold while violating maximum input-voltage rating.
- Logic threshold compatibility does not prove electrical safety.
- Input tolerance and absolute maximum ratings must be checked separately.
- CMOS input thresholds may scale with supply voltage depending on the logic family.
- TTL-compatible inputs use different threshold conventions from many CMOS inputs.
- HCT devices are commonly designed with TTL-compatible input thresholds.
- The region between VIL,max and VIH,min is not guaranteed LOW or HIGH.
- Open-drain outputs require a pull-up to establish HIGH.
- Open-drain static threshold analysis does not verify rise time or sink current.
- Real compatibility can also depend on output current, load current, capacitance, temperature and supply tolerance.
Common Mistakes
- Comparing only 3.3 V and 5 V supply labels.
- Treating VCC as guaranteed VOH,min.
- Treating ground as guaranteed VOL,max.
- Using typical values instead of guaranteed datasheet limits.
- Checking HIGH compatibility but ignoring LOW compatibility.
- Writing the noise-margin formulas with reversed signs.
- Confusing NMH with NML.
- Treating margin = 0 as a robust design.
- Ignoring the undefined input region.
- Assuming A to B compatibility means B to A compatibility.
- Ignoring receiver absolute maximum input voltage.
- Assuming logic-compatible means electrically safe.
- Treating open-drain HIGH as an actively driven output.
- Ignoring pull-up voltage and rise-time behavior.
- Assuming all CMOS thresholds are fixed at 0.7 VCC and 0.3 VCC.
Support reference
FAQ
What are VOH, VOL, VIH, and VIL?
VOH,min is the driver's guaranteed minimum HIGH output voltage. VOL,max is the driver's guaranteed maximum LOW output voltage. VIH,min is the receiver's minimum guaranteed HIGH input threshold. VIL,max is the receiver's maximum guaranteed LOW input threshold.
How do I know if two logic levels are compatible?
Check both directions of the static DC threshold relationship: VOH,min must be greater than or equal to VIH,min, and VOL,max must be less than or equal to VIL,max.
How do I calculate HIGH noise margin?
HIGH noise margin is NMH = VOH,min - VIH,min. A positive value gives HIGH-level threshold headroom. Zero margin is only a boundary condition.
How do I calculate LOW noise margin?
LOW noise margin is NML = VIL,max - VOL,max. A positive value gives LOW-level threshold headroom.
Can a 3.3 V output drive a 5 V input?
Sometimes, but not based on supply voltage alone. Compare the 3.3 V driver's guaranteed VOH,min with the 5 V receiver's VIH,min.
Can a 5 V output drive a 3.3 V input?
The logic threshold may pass, but the receiver input may still exceed its absolute maximum rating. VIN,max and input tolerance must be checked separately.
What is the undefined logic region?
For a receiver, Vin at or below VIL,max is guaranteed LOW, Vin at or above VIH,min is guaranteed HIGH, and voltages between VIL,max and VIH,min are usually undefined.
What does zero noise margin mean?
Zero margin means the threshold is exactly at the mathematical boundary. It provides no threshold headroom and should be treated as marginal, not as a robust design.
Should I use typical or guaranteed datasheet values?
Use guaranteed datasheet limits such as VOH,min, VOL,max, VIH,min and VIL,max for worst-case compatibility. Typical values should not be used to claim guaranteed compatibility.
What is the difference between TTL and CMOS logic levels?
Classic TTL and many CMOS inputs use different threshold conventions. Some CMOS thresholds scale with VCC, while HCT devices are commonly designed with TTL-compatible input thresholds.
How do open-drain outputs affect compatibility?
An open-drain output does not actively drive HIGH. The HIGH level is established by the pull-up voltage minus loading or leakage drop, while LOW is set by the sinking driver VOL,max.
Does logic-level compatibility mean the connection is electrically safe?
No. Static threshold compatibility does not prove electrical safety. Check absolute maximum ratings, input tolerance, clamp current, output current, loading, power sequencing and the device datasheet.
When do I need a level shifter?
Use a level shifter when guaranteed thresholds do not match, when the receiver is not input-tolerant to the driver's HIGH voltage, or when bidirectional/open-drain bus requirements demand it.
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