Pi Filter Calculator
Analyze passive C-L-C and C-R-C pi filters for power-supply ripple reduction, loaded frequency response, resonance reference, CRC DC voltage drop, resistor dissipation, and bounded sweep behavior.
This is a power-supply / filtering pi calculator, not an RF pi impedance-matching network synthesizer.
Engineering tool
Pi Filter Calculator
Analyze passive C-L-C and C-R-C pi filters for power-supply ripple reduction, loaded response, DC loss, resonance reference, and frequency sweep behavior.
Parameter panel
Result console
- Gain
- 0.33215V/V
- Attenuation
- 9.5733 dB
- Phase
- 168.274°
- Ceq Reference
- 50 µF
- Resonance Reference
- 711.762543 Hz
| Topology | C1 to ground, series L, C2 || RL to ground | This is a power-supply / filtering pi topology. |
|---|---|---|
| Loaded Response | 0.33215 V/V | Calculated with complex nodal analysis, not C1+C2 simplification. |
| Input Impedance | 2.40863 Ω | Approximate ideal small-signal input impedance. |
| Boundary | Not RF matching | This calculator does not synthesize impedance transformation networks. |
Formula reference
Pi Filter Formulas
The V1 model calculates loaded passive pi-filter response with complex nodal analysis and separates CLC resonance reference from loaded cutoff.
Ceq = C1C2 / (C1 + C2)fres = 1 / (2π√(L × Ceq))Vout,DC = Vin × RL / (Rs + R + RL)Iload = Vin / (Rs + R + RL)PR = Iload² × RVripple,out = Vripple,in × |H(fripple)|Gain dB = 20log10(|H|)Attenuation dB = -20log10(|H|)Variable definitions
- C1
- input shunt capacitor
- C2
- output shunt capacitor
- L
- CLC series inductor
- R
- CRC series resistor
- Rs
- source resistance
- RL
- load resistance
- H(jω)
- Vout / Vin
Pi Filter Formula Audit
| FIL-012 Scope | Passive CLC and CRC power-supply / low-pass pi filters. |
|---|---|
| RF Pi Matching Separation | No source/load impedance transformation or RF matching synthesis. |
| CLC Adopted Topology | C1 shunt at input node, series L, C2 and RL shunt at output node. |
| CRC Adopted Topology | C1 shunt at input node, series R, C2 and RL shunt at output node. |
| Source Model | Thevenin source with optional series Rs; Rs = 0 is allowed and documented. |
| Load Model | Finite resistive load RL is required for useful loaded response. |
| CLC Complex Transfer Model | Two-node complex nodal analysis using C1, L, C2, Rs, and RL. |
| CRC Complex Transfer Model | Two-node complex nodal analysis using C1, R, C2, Rs, and RL. |
| CLC Effective Capacitance | Ceq = C1C2/(C1+C2) for resonance reference only. |
| CLC Resonance Reference | fres = 1/(2π√(LCeq)); not claimed as loaded -3 dB cutoff. |
| Loaded Cutoff Boundary | Loaded response is calculated at selected frequencies; exact cutoff requires sweep or simulation. |
| Ripple Attenuation | Attenuation = -20log10(|H|), output ripple = input ripple × |H|. |
| CRC DC Gain | Vout = Vin × RL/(Rs + R + RL). |
| CRC Current | I = Vin/(Rs + R + RL). |
| CRC Power | PR = I²R for the intentional series resistor. |
| Gain dB Convention | Voltage gain uses 20log10(|H|), not 10log10. |
| Peaking Handling | Sweep-based CLC peaking warning, with resolution boundary stated. |
| Converter Stability Boundary | Passive attenuation does not prove SMPS control-loop stability. |
Worked Examples
CLC resonance
Known: C1 = C2 = 100 µF, L = 1 mH
Ceq = 50 µF, fres ≈ 711.76 Hz.
Equal capacitors
Known: C1 = C2 = C
Ceq = C/2.
Unequal capacitors
Known: C1 = 100 µF, C2 = 47 µF
Ceq = C1C2/(C1+C2).
CRC DC output
Known: Vin = 12 V, R = 10 Ω, RL = 100 Ω
Vout ≈ 10.9091 V.
CRC current
Known: Same values
I ≈ 109.091 mA.
CRC resistor loss
Known: Same values
PR ≈ 0.1190 W.
Light load CRC
Known: RL much larger than R
DC gain approaches 1.
Comparable R and RL
Known: R comparable to RL
DC voltage drop becomes significant.
Ripple attenuation
Known: 1 V input ripple, |H| = 0.1
Output ripple = 0.1 V, attenuation = 20 dB.
CLC low frequency
Known: Ideal low-frequency limit
Capacitors open and inductor approaches short; source/load relation dominates.
CLC high frequency
Known: Ideal high-frequency limit
Shunt capacitors reduce output strongly.
CRC high frequency
Known: Frequency above corner region
Output attenuation increases.
CLC peaking
Known: Lightly loaded ideal CLC
Warning is shown instead of NaN/Infinity.
CLC vs CRC
Known: Same source/load/ripple frequency
CLC has low ideal series loss; CRC has resistor loss.
Frequency units
Known: 1000 Hz and 1 kHz
Equivalent response.
Log sweep
Known: 50 points
Finite ordered rows.
Round-trip solver
Known: Target fres + capacitors → L → analyze
Recovered resonance reference.
Ripple harmonic
Known: One harmonic at one frequency
Output = input × |H|.
Rs = 0
Known: Ideal source boundary
Numerically stable, with damping warning.
Very high RL
Known: Lightly loaded output
No NaN/Infinity leak; high-Q boundary noted.
Pi Filter
A pi filter uses two shunt elements around a series element.
CLC Filter
CLC is common for low-loss power-supply ripple filtering, but it can resonate.
CRC Filter
CRC is simple and damped, but the series resistor drops DC voltage and dissipates heat.
Load Resistance
Useful response analysis requires RL because loading changes damping and gain.
Source Resistance
Rs affects C1 interaction, damping, and passband behavior.
Inductor DCR
Real inductors have DCR, core loss, current rating, and saturation limits.
Capacitor ESR / ESL
Real capacitors have ESR, ESL, ripple-current limits, and self-resonance.
Switching Regulators
Pi filters can interact with converter control loops; verify manufacturer stability guidance.
Common Mistakes
Support reference
FAQ
What is a pi filter?
A pi filter is a three-element filter with two shunt elements around one series element. In this calculator, the supported passive power-filter forms are C-L-C and C-R-C.
How does a CLC pi filter work?
A CLC filter uses input and output capacitors to ground with a series inductor between them. It can reduce ripple with low ideal DC loss, but it can resonate if damping is low.
How does a CRC pi filter work?
A CRC filter uses two shunt capacitors and a series resistor. The resistor damps the filter and reduces ripple, but it also creates DC voltage drop and heat.
How do I calculate the resonant frequency of a CLC pi filter?
A useful reference is Ceq = C1C2/(C1+C2), then fres = 1/(2π√(LCeq)). This is a resonance reference, not the full loaded -3 dB cutoff.
How do I calculate ripple attenuation?
For one sinusoidal ripple component, calculate the loaded transfer magnitude |H| at the ripple frequency. Output ripple is Vripple,out = Vripple,in × |H|.
What is the difference between CLC and CRC filtering?
CLC can provide stronger filtering with low ideal DC loss but may ring. CRC is simple and inherently damped but loses DC voltage and dissipates power.
Why does a CRC filter cause voltage drop?
At DC, capacitors are open circuits, so the series resistor and load resistance form a voltage divider.
How do I calculate CRC resistor power dissipation?
Using the simplified DC load model, I = Vin/(Rs + R + RL), and PR = I²R for the intentional series resistor.
Why can a CLC filter ring?
The inductor and capacitors form a resonant network. Source resistance, load resistance, inductor DCR, capacitor ESR, and added damping control the actual Q.
How does load resistance affect a pi filter?
Load resistance damps the output node and changes the transfer response. Light loading can increase CLC peaking.
How does source resistance affect damping?
Source resistance interacts with the input capacitor and series element, changing passband response and resonance damping.
What do inductor DCR and capacitor ESR do?
DCR and ESR add real loss, reduce ideal Q, change attenuation, create heat, and can provide damping that is absent from ideal component calculations.
Can a pi filter affect switching-regulator stability?
Yes. A large LC or CLC filter can interact with a converter control loop. Check the regulator datasheet and loop stability guidance.
Is this the same as an RF pi matching network?
No. This is a passive power-supply / low-pass filtering calculator. It does not synthesize RF impedance transformation networks.
How do I choose between CLC and CRC?
Use CLC when DC loss must be low and inductor size, current rating, DCR, and damping can be managed. Use CRC for low-current nodes where voltage drop and resistor power are acceptable.
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Engineering Disclaimer
This calculator uses ideal passive CLC and CRC small-signal models. It does not model capacitor ESR, capacitor ESL, inductor DCR, inductor saturation, core loss, thermal rise, PCB parasitics, common-mode EMI behavior, or converter control-loop stability. Verify critical power filters with datasheets, SPICE, manufacturer guidance, and measurement.