Common Emitter Amplifier Calculator
Estimate the DC operating point, small-signal emitter resistance, voltage gain, and loading of a BJT common-emitter amplifier.
Use the tool to compare emitter degeneration with a bypassed emitter resistor and to check whether the selected collector current leaves practical voltage headroom for signal swing.
Engineering tool
Common Emitter Amplifier Calculator
Estimate DC bias, small-signal voltage gain, loading, and collector-emitter headroom for a BJT common-emitter stage.
DC supply applied to the collector resistor.
Collector load resistor connected to VCC.
DC emitter degeneration and bias-stabilizing resistance.
Quiescent collector current; IE is approximated as IC.
AC load seen at the collector output.
Leave blank to estimate re automatically as 26 mV / IE.
Bias / headroom status
Good Headroom
The DC operating point retains useful collector-emitter headroom. Verify the required symmetrical signal swing and transistor limits in simulation.
Result console
- DC collector voltage (VC)
- 7.3V
- Emitter voltage (VE)
- 1V
- VCE operating point
- 6.3V
- Small-signal emitter resistance (re)
- 26Ω
- Voltage gain (Av)
- -4.580897V/V
- Gain magnitude
- 13.21901dB
- Loaded collector resistance
- 4.489016kΩ
- Load-adjusted gain
- -4.375259V/V
- Loaded gain magnitude
- 12.820076dB
Formula reference
Common Emitter Amplifier Formulas
These first-order equations assume forward-active operation, adequate bypass capacitance when selected, and negligible transistor output resistance.
Small-signal resistance: re ≈ 26 mV / IEUnbypassed gain: Av ≈ -RC / (RE + re)Bypassed gain: Av ≈ -RC / reLoaded gain: Av,loaded ≈ -(RC || RL) / (RE + re)Collector voltage: VC = VCC - IC × RCEmitter voltage: VE ≈ IC × REOperating point: VCE = VC - VEGain magnitude: dB = 20 log10(|Av|)Variable definitions
- IE ≈ IC for preliminary small-signal estimation
- RC || RL
- loaded collector resistance
- The negative gain sign indicates phase inversion
- RE remains in the DC bias path when bypassed for AC
Worked Example
VCC = 12 V, RC = 4.7 kΩ, RE = 1 kΩ, IC = 1 mA, RL = 100 kΩ, emitter capacitor not bypassed.
re ≈ 0.026 / 0.001 = 26 Ω
VC = 12 - (0.001 × 4700) = 7.3 V
VE = 0.001 × 1000 = 1 V, so VCE = 6.3 V
Av ≈ -4700 / (1000 + 26) ≈ -4.58 V/V
RC || RL ≈ 4.49 kΩ, so loaded gain ≈ -4.38 V/V or 12.82 dB.
Engineering Notes
Signal inversion
Common-emitter amplifiers invert the signal, producing approximately 180 degrees of phase shift.
Emitter degeneration
Emitter degeneration reduces gain but improves bias stability, linearity, and predictability.
Bypass capacitor
A bypass capacitor increases AC gain when its reactance is sufficiently low across the operating frequency range.
Device and load effects
Real gain depends on transistor parameters, source impedance, output resistance, frequency, and external loading.
Bias headroom
The quiescent collector voltage should leave enough voltage headroom for the required output signal swing without cutoff or saturation.
Support reference
FAQ
What is a common-emitter amplifier?
A common-emitter amplifier is a BJT voltage-amplifier stage with the emitter serving as the common reference for input and output. The input drives the base and the amplified, inverted output is taken from the collector.
Why is the gain negative?
Increasing base voltage raises collector current, which increases the voltage drop across RC and lowers collector voltage. The output therefore moves opposite to the input, producing a negative gain sign and 180-degree phase inversion.
What does the emitter resistor do?
The emitter resistor provides negative feedback that stabilizes current and bias against transistor gain and temperature variation. For AC signals it also reduces gain when it is not bypassed.
How does a bypass capacitor affect gain?
A sufficiently large bypass capacitor presents a low AC impedance across RE, so gain is set mainly by RC and the transistor small-signal emitter resistance re. DC bias still depends on RE.
Why does load resistance reduce gain?
The external load appears in parallel with RC for AC signals. This lowers the effective collector resistance and therefore reduces the magnitude of the available voltage gain.
Documentation
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